Osamu2-dis-kb-hpc Mv-mb-v1 Schematic =link= [ Full – Playbook ]

It’s important to clarify that “osamu2-dis-kb-hpc mv-mb-v1” does not appear to be a standard, publicly documented schematic name from major vendors (e.g., Intel, AMD, NVIDIA, Raspberry Pi, or mainstream laptop/desktop boards).

It looks like a custom or internal project designation – possibly from: osamu2-dis-kb-hpc mv-mb-v1 schematic

  • An open-source hardware design (e.g., a keyboard + display + HPC compute module carrier board)
  • A maker or research project named “Osamu 2”
  • A university or lab’ internal revision (mv-mb-v1 = maybe “mainboard version 1”)

Given that, I’ll provide a generic reverse-engineering and documentation guide for understanding such a schematic if you have the actual file (PDF, .sch, or image). An open-source hardware design (e

Page 2: Power Tree

  • Location of enable pins and power-good (PG) daisy chains.
  • Example: +VIN_12V → Vcore (0.85V @ 40A) → VDDQ (1.2V) → VCCIO (3.3V)

D. Keyboard Matrix Ghosting

The 8x16 matrix in the KB section must include diodes at each key switch intersection to prevent ghosting. A good schematic will show a diode array (e.g., BAT54S) in series with every row line. Given that, I’ll provide a generic reverse-engineering and

5. Interpreting the Revision History (v1 to v2)

Since this is v1 (pre-production), the schematic likely contains "Not Fitted" (NF) components and "Design Notes." Look for these typical v1 compromises:

  • Zero-ohm jumpers: Used to select between eDP and LVDS display interfaces.
  • Populated vs. Unpopulated RC filters: On the USB or PCIe reference clocks to tune for margin.
  • Test points: 40-60 test points (TP1...TPn) scattered across the HPC power rails and high-speed clocks for oscilloscope probing.

Page 5: Display & Keyboard Combined Connector

  • A dual-purpose 50-pin 0.5mm FPC holding both display data and keyboard rows/columns.
  • This is unusual and a key differentiator of the osamu2 design – reduces cabling.

1. System Overview

This schematic defines the interconnections for the Osamu2 platform:

  • HPC Module Socket (e.g., SOM/COM Express, Raspberry Pi CM4, or custom HPC)
  • Display Interface (MIPI DSI / LVDS / eDP)
  • Keyboard Matrix (8x8 or 6x6 with I/O expander or direct MCU pins)
  • Power Management (PMIC/buck converters for HPC, display backlight, KB LEDs)

B. Strap Pins / Configuration Resistors

The "osamu2" SoC likely reads boot configuration from pull-up/pull-down resistors on power-up. The schematic must clearly label these:

  • BOOT_MODE[1:0] = 10b (eMMC boot)
  • PCIe_CLKREQ# = Pulled low for active clock request.

2.4 Keyboard Matrix (kb)

  • A dedicated microcontroller (e.g., NXP LPC11U24) or integrated keyboard scan engine in the main SoC.
  • Debounce capacitors (100nF typical) on each column line.
  • ESD protection arrays (e.g., USBLC6-2) on external KB connector.