Crt Clock Schematic Today

The following is a technical narrative describing the design and logic of a discrete logic CRT Clock, a device that turns the ephemeral nature of time into a physical dance of electrons.

The Vector List (Example for Digit "0")

A "0" is drawn with a box or two arcs. A typical schematic uses 16 points per digit for smoothness. (0,0) -> (10,0) -> (10,20) -> (0,20) -> (0,0)

The Problem: High Voltage Swing

To move the beam to the corner of the screen, the deflection plates require a differential voltage swing of roughly ±50V to ±100V. Your microcontroller outputs 0V to 5V. You need an amplifier.

Part 6: Complete Schematic Deconstruction (Major Nodes)

Let’s walk through a complete, proven schematic available on GitHub (search "TinyScope Clock" or "TubeClock V4"). Crt Clock Schematic

The Block Diagram of a CRT Clock

A standard schematic breaks down into four distinct subsystems:

  1. The High Voltage (HV) Supply: Generates +400V to +600V for the CRT anode and focus.
  2. The Heater Supply: 6.3V AC/DC for the tube filament.
  3. The Deflection System: Dual differential amplifiers (X and Y axes) controlled by DACs.
  4. The Logic Controller: Microcontroller (Arduino/STM32) or 7400 series logic generating the time data and vector coordinates.

The Classic Royer Oscillator (ZVS Driver)

Most efficient schematics use a Royer oscillator (ZVS) to drive a ferrite core flyback transformer.

Schematic Excerpt:

  • Q1, Q2: IRFZ44N or BU508A (MOSFETs) in push-pull.
  • L1, L2: Primary windings (center-tapped) on an EFD25 core.
  • Secondary: High turns ratio (1:40) with voltage multiplier (Cockcroft-Walton).

Components:

  • Diodes: Fast recovery (UF4007) for the multiplier chain.
  • Capacitors: 1nF / 3kV ceramic for the multiplier stages.
  • Feedback Winding: Ensures self-oscillation at ~30kHz–50kHz (avoids audible whine).

Output Rails (Typical):

  • Anode (A): +1200V @ <1mA (via diode stack).
  • Focus (G3/G4): +400V (derived from divider chain).
  • Astig (G2): +200V (Screen grid).

Schematic Warning: Do not use a 555 timer into a MOSFET for this. Royer topology is self-resonant and much cleaner for clock applications. The following is a technical narrative describing the

5.1 Bandwidth

The deflection amplifiers must handle slew rates > 10V/µs. If the amplifier is too slow, diagonal lines will appear curved (rounded corners). The TIP122 pair is generally slow; for high quality, use OPA551 or discrete MOSFET drivers.

The Heart of the Matter: The Electrostatic CRT

Unlike standard television tubes that use magnetic deflection coils wrapped around the neck of the tube, most DIY CRT clocks utilize small electrostatic deflection tubes. These tubes, such as the ubiquitous 3RP1, 5BP1, or the Soviet 13LO3I, contain two sets of internal plates (X and Y) that steer the electron beam via high-voltage electric fields rather than magnetic ones. The schematic of a CRT clock revolves entirely around controlling these plates.

The core architecture of the schematic is divided into three distinct voltage domains: the low-voltage logic section (5V DC), the medium-voltage analog driver section (±12V to ±50V), and the high-voltage section (approx. 1,000V to 1,600V for the anode and focus grids). Successfully reading a CRT clock schematic requires understanding how these three worlds interact. The Vector List (Example for Digit "0") A

Node 4: Deflection Final Stage

  • Op-Amp: TL082 (preamp) -> Push-pull MJE340/350.
  • Power supply: +100V and -100V rails (generated from a 48V transformer center tap).