16c95x Serial Port Driver !new!

Title: Implementation and Analysis of the 16C95X Serial Port Driver

Abstract: The 16C95X is a popular UART (Universal Asynchronous Receiver-Transmitter) chip used in various computer systems for serial communication. This paper presents an in-depth analysis and implementation of the 16C95X serial port driver. We discuss the architecture of the 16C95X, its features, and the challenges faced while developing a driver for it. The paper also provides a detailed overview of the driver implementation, including the interrupt handling mechanism, data transmission and reception, and error handling.

Introduction: Serial communication is a widely used method for transferring data between devices. The 16C95X UART chip is a widely used component in many computer systems, providing a reliable and efficient way to perform serial communication. However, to utilize the 16C95X chip, a driver is required to manage its operations and facilitate communication between the chip and the operating system. This paper focuses on the development of a 16C95X serial port driver.

Architecture of 16C95X: The 16C95X UART chip consists of several key components:

Transmitter: Converts parallel data into serial data and transmits it over the serial line.
Receiver: Receives serial data from the serial line and converts it into parallel data.
Control Unit: Manages the overall operation of the chip, including interrupt generation and handling.

The 16C95X chip has several registers that are used to configure and control its operation. These registers include:

RBR (Receive Buffer Register): Stores received data.
THR (Transmit Hold Register): Stores data to be transmitted.
IER (Interrupt Enable Register): Enables or disables interrupts.
IIR (Interrupt Identification Register): Identifies the source of an interrupt.

Driver Implementation: The 16C95X serial port driver is responsible for managing the chip's operations, including:

Initialization: Configuring the chip's registers and setting up interrupt handling.
Data Transmission: Writing data to the THR register and managing the transmission process.
Data Reception: Reading data from the RBR register and handling receive interrupts.
Error Handling: Detecting and handling errors, such as parity errors and overrun errors.

The driver implementation involves several key steps:

Interrupt Handling: The driver installs an interrupt handler to manage interrupts generated by the 16C95X chip. The interrupt handler reads the IIR register to determine the source of the interrupt and performs the necessary actions.
Data Transmission: The driver uses the THR register to transmit data. It writes data to the THR register and sets the transmitter empty interrupt enable bit in the IER register.
Data Reception: The driver uses the RBR register to receive data. It reads data from the RBR register and handles receive interrupts.

Interrupt Handling Mechanism: The interrupt handling mechanism is a critical component of the 16C95X serial port driver. The driver installs an interrupt handler that is called when an interrupt occurs. The interrupt handler performs the following steps:

Read IIR Register: Reads the IIR register to determine the source of the interrupt.
Handle Interrupt: Performs the necessary actions based on the interrupt source, such as reading data from the RBR register or writing data to the THR register.

Conclusion: In this paper, we presented an in-depth analysis and implementation of the 16C95X serial port driver. We discussed the architecture of the 16C95X chip, its features, and the challenges faced while developing a driver for it. The paper provided a detailed overview of the driver implementation, including the interrupt handling mechanism, data transmission and reception, and error handling. The 16C95X serial port driver is a critical component of many computer systems, and its proper implementation is essential for reliable and efficient serial communication.

References:

[1] 16C95X UART Chip Datasheet
[2] Serial Communication Tutorial
[3] Linux Device Drivers, 3rd Edition

Appendix: Here is a sample code snippet that demonstrates the implementation of the 16C95X serial port driver:

#include <linux/module.h>
#include <linux/init.h>
#include <linux/tty.h>
#include <linux/serial.h>
#define UART_PORT 0x3F8
#define UART_IRQ 4
static struct uart_ops ops = 
    .tx_empty = my_tx_empty,
    .get_mctrl = my_get_mctrl,
    .set_mctrl = my_set_mctrl,
    .putc = my_putc,
    .getc = my_getc,
;
static int my_uart_init(void)
int retval;
    retval = request_irq(UART_IRQ, my_uart_interrupt, IRQF_SHARED, "my_uart", NULL);
    if (retval) 
        printk(KERN_ERR "my_uart: unable to request IRQ\n");
        return retval;
uart_register(&ops, UART_PORT);
    return 0;
static void my_uart_interrupt(int irq, void *dev_id, struct pt_regs *regs)
unsigned char iir;
    iir = inb(UART_PORT + UART_IIR);
    if (iir & UART_IIR_RXDA) 
        /* Handle receive interrupt */
     else if (iir & UART_IIR_TXDE) 
        /* Handle transmit interrupt */
static int my_putc(struct uart_port *port, int c)
outb(c, UART_PORT + UART_THR);
    return 0;
static int my_getc(struct uart_port *port)
return inb(UART_PORT + UART_RBR);
module_init(my_uart_init);

Note that this is a simplified example and may require modifications to work with a specific operating system and hardware configuration.

The 16C95x Serial Port refers to a high-performance UART (Universal Asynchronous Receiver/Transmitter) typically found on Oxford Semiconductor based PCI or PCIe expansion cards. These ports are common in industrial equipment, modems, and legacy hardware interfaces due to their large 128-byte or 256-byte FIFO buffers. Quick Fix: Installation Guide

If you see "PCI Serial Port" with a yellow exclamation mark in your Device Manager, follow these steps to resolve it:

Identify Your Chipset: Most 16C95x devices use Oxford Semiconductor (now part of PLX Technology/Broadcom) chips. Look for Hardware IDs like PCI\VEN_1415 or OXPCIMF\PNP0501 in the device properties. Download Sources:

Manufacturer Support: Check the website of the card manufacturer (e.g., StarTech, SIIG, or Perle). For example, Perle provides standard Linux and Windows drivers for their multiport cards.

Generic Drivers: If you lack a specific brand, search for "Oxford OX16C95x Reference Drivers." DriverIdentifier often hosts mirrors for legacy hardware like HP, Dell, and Pegatron systems. Manual Update: 16c95x serial port driver

Right-click the device in Device Manager and select Update Driver.

Choose "Browse my computer for drivers" and point it to the extracted folder of the driver you downloaded. Technical Features of 16C95x

High Speed: Supports baud rates up to 15 Mbps (standard UARTs often cap at 115.2 Kbps).

Enhanced Buffering: Features 128-byte or 256-byte FIFOs to prevent data loss during high-speed transfers.

Compatibility: Supports automated flow control and is often backwards compatible with 16C450, 16C550, and 16C650 UARTs. Common Troubleshooting 16C95x Serial Port Driver for Pegatron - DriverIdentifier

16C95x serial port driver is a high-performance software interface designed for Oxford Semiconductor (OxSemi) UART chips, most notably the

series. These drivers are commonly used to enable multi-port RS-232, RS-422, or RS-485 serial communication in industrial, retail, and professional computing environments. Center for Detectors | RIT Core Technical Features

The 16C95x driver unlocks advanced hardware capabilities of the OxSemi chipset that exceed standard 16C550 serial port specs: Large 128-Byte FIFOs

: Significantly deeper than the standard 16-byte buffers, reducing CPU overhead and preventing data loss at high speeds. High Speed Data Rates : Supports baud rates up to in normal mode and up to

in external 1x clock mode (though specific hardware like PCIe cards often cap at 460.8 Kbps 921.6 Kbps for RS-232 stability). Advanced Flow Control : Automatic in-band ( ) and out-of-band ( ) hardware flow control to manage data traffic efficiently. Enhanced Customization Adjustable Trigger Levels

: Users can fine-tune interrupt trigger levels for both transmitter and receiver FIFOs. Quad Speed Mode

: Utilizes the "Times" clock register to boost communication speed. 9-Bit Data Support

: Beyond standard 5, 6, 7, and 8-bit framing, it supports 9-bit data for specific industrial protocols. Hardware & OS Compatibility

16C95x Serial Port Driver for Dell - Vostro 260 - DriverIdentifier

Linux Kernel Driver

In mainline Linux, the driver is part of drivers/tty/serial/8250/8250_exar.c or, for generic PCIe/PCI 16C95x cards, the 8250_pci.c with added quirks. However, for standalone 16C95x chips on memory-mapped buses, you might need a platform driver.

Device Tree Example:

uart1: serial@20080000 
    compatible = "nxp,16c950";
    reg = <0x20080000 0x1000>;
    interrupts = <8>;
    clock-frequency = <1843200>;
    current-speed = <115200>;
    auto-flow-control;
;

Loading the driver:

modprobe 8250
echo "00:08.0" > /sys/bus/pci/drivers/8250-pci/bind

7. Conclusion

The 16C95x serial port driver is a critical software component that bridges the gap between high-performance hardware and standard operating system APIs. Unlike legacy drivers, the 16C95x driver must leverage 128-byte FIFOs and fractional baud rate generation to fully utilize the hardware's capabilities. Proper implementation of flow control and interrupt handling is essential to maintain data integrity at high speeds.

The 16C95x Serial Port Driver is a specialized piece of software designed to manage communication for high-performance UART (Universal Asynchronous Receiver-Transmitter) chips, specifically those in the Oxford Semiconductor (now part of MaxLinear) family. What is the 16C95x?

Unlike standard serial ports that rely on older 16550 technology, the 16C95x series (such as the OX16C950 or OX16C954) was built for speed and efficiency.

Deep Buffers: These chips feature much larger 128-byte FIFOs (First-In, First-Out buffers) compared to the tiny 16-byte buffers in traditional 16550 UARTs, which significantly reduces the risk of data loss during high-speed transfers.

High Performance: It supports baud rates much higher than the standard 115,200 bps, often reaching up to 15 Mbps in certain configurations. Common Uses and Recognition

You will typically encounter this driver if you have added a PCI or PCI-Express (PCIe) serial expansion card to a desktop or industrial computer.

Device Manager: When installed correctly, it appears under the "Ports (COM & LPT)" section as "16C95x Serial Port".

Industrial Application: Because of its reliability and deep buffers, it is frequently used in industrial equipment, such as dairy management systems or CNC machines, that require stable, long-term serial communication. Troubleshooting and Modern Compatibility

While these chips were standard in the Windows XP and Windows 7 eras, they can be tricky to set up on modern systems:

The 16C95x serial port driver is a fundamental piece of software infrastructure that enables high-performance asynchronous communication between modern operating systems and high-speed UART (Universal Asynchronous Receiver/Transmitter) hardware. Specifically designed for the Oxford Semiconductor (now part of Diodes Incorporated) 16C950, 16C954, and 16C958 families, these drivers are the bridge that allows industrial and legacy hardware to interface with contemporary computing environments. Technical Foundation and Architecture

The 16C95x family is renowned in the embedded and industrial sectors for significantly exceeding the capabilities of the standard 16550 UART. While the classic 16550 utilizes a 16-byte FIFO (First-In, First-Out) buffer, the 16C95x series features a massive 128-byte FIFO.

The driver is responsible for managing this increased buffer depth to:

Prevent Data Overruns: By leveraging the larger buffer, the driver reduces the frequency of interrupts sent to the CPU, allowing the system to handle high-speed data streams (up to 15 Mbps in some configurations) without losing packets.

Automatic Flow Control: The driver configures the hardware's built-in automated RTS/CTS (Request to Send/Clear to Send) or XON/XOFF flow control, ensuring that communication pauses and resumes seamlessly based on buffer availability. Evolution of the Driver

Originally developed for Windows 95 and NT, the 16C95x driver has undergone several transformations to maintain compatibility with modern systems: Title: Implementation and Analysis of the 16C95X Serial

Legacy WDM Drivers: In the early 2000s, these drivers functioned as Windows Driver Model (WDM) components, often bundled with PCI or PCMCIA expansion cards.

Universal Windows Drivers (UWD): Modern iterations are often compliant with Windows 10 and 11, focusing on 64-bit architecture and Secure Boot compatibility.

Linux Integration: In the Linux ecosystem, support for the 16C95x is typically baked into the kernel's 8250 or serial core drivers. Because the 16C950 is backward compatible with the 16550, the kernel automatically detects the enhanced features (like the larger FIFO) and enables them via the standard serial interface (/dev/ttyS*). Implementation in Industrial Contexts

You will most commonly encounter the 16C95x driver when deploying:

Multi-Port Serial Cards: Used in server rooms to manage multiple consoles or in retail for Point-of-Sale (POS) systems.

Automation Hardware: PLCs and CNC machines that require low-latency, high-reliability serial links.

Scientific Instruments: Data loggers that output high-density information over RS-232, RS-422, or RS-485 protocols. Installation and Troubleshooting

When installing a 16C95x driver, the process usually involves an .inf file that tells the operating system how to map the hardware’s I/O ports and IRQs (Interrupt Requests). Common troubleshooting steps for these drivers include:

FIFO Tuning: If data corruption occurs, users often use the driver's advanced settings to lower the "Receive Buffer" trigger level.

Baud Rate Aliasing: Because the 16C95x supports non-standard high speeds, drivers sometimes use "clock multipliers" to achieve specific baud rates that standard software doesn't recognize.

Tx Interrupt

The Tx interrupt (THRE – Transmitter Holding Register Empty) asserts when the Tx FIFO falls below the programmed trigger level (default empty). The driver’s Tx ISR should fill the FIFO up to its capacity or until the Tx buffer is empty.

void uart_isr_tx(uart_t *dev)
while (!(read_reg(dev->base + UART_LSR) & LSR_TXFIFO_FULL)) 
        if (ringbuf_empty(&dev->tx_ring)) 
            // No more data: disable Tx interrupt
            uint8_t ier = read_reg(dev->base + UART_IER);
            write_reg(dev->base + UART_IER, ier & ~IER_THRE);
            break;
uint8_t data = ringbuf_pop(&dev->tx_ring);
        write_reg(dev->base + UART_THR, data);

A common pitfall: After initial Tx, you must enable THRE interrupt only when there is data to send. Many drivers enable it unconditionally, causing an immediate interrupt storm.

9) Example pseudo-code snippets

PCI probe (outline)

pci_enable_device
pci_request_regions
map MMIO region via ioremap or pci_iomap
read device capability registers and determine number_of_ports, FIFO depth
reset device, disable interrupts
for each port: init uart_port structure, uart_add_one_port

IRQ handler (outline)

status = readl(mmio + GLOBAL_INT_STATUS)
while (status has pending channel bit):
- ch = next_set_bit(status)
- iir = read_channel_reg(ch, IIR)
- switch (iir & IID_MASK):
  - RX_AVAILABLE: read FIFO into local buffer; schedule push to tty
  - TX_EMPTY: fill FIFO from tx queue
  - LINE_STATUS: lsr = read_channel_reg(ch, LSR); handle errors
  - MODEM_STATUS: msr = read_channel_reg(ch, MSR); update signals
- clear per-channel interrupt
return IRQ_HANDLED

Transmit refill (outline)

while (fifo_space && tx_queue not empty):
- byte = dequeue(tx_queue)
- write_channel_reg(ch, THR, byte)
if (tx_queue empty): disable TX interrupt for ch; notify tty core

Writing a Custom 16C95x Driver from Scratch

For embedded developers without OS support, here is a minimal driver skeleton: Transmitter: Converts parallel data into serial data and

// Pseudocode for bare-metal 16C950 driver
void uart16c95x_init(uint32_t base_addr)  0x02); // Auto RTS/CTS
    write_reg(base_addr + UART_LCR, 0x03);  // 8N1
    // 4. Enable interrupts
    write_reg(base_addr + UART_IER, 0x01);  // RX data ready

Performance Optimization Tuning

To achieve maximum throughput (> 1 Mbps), follow these guidelines:

Increase RX Trigger Level: Set to 120 bytes (FCR bits 6-7 = 11). Reduces interrupts.
Use DMA: Most embedded 16C95x drivers support DMA offload. Enable CONFIG_SERIAL_8250_DMA.
Isolate IRQ: Use irqbalance or set /proc/irq/XXX/smp_affinity to a dedicated core.
Disable Software Flow Control: Use stty -crtscts and rely on hardware flow control.

Benchmark result: With an optimized 16C95x driver at 3 Mbps, 115,000 interrupts/sec vs. 900,000 interrupts/sec on a 16550—a 87% reduction in CPU load.